Conventionally, A semiconductor chip such as IC or LSI has been fabricated in the following structure in which circuit elements is formed in a semiconductor layer so as to form a circuit, and electrode terminals for connection with an external circuit are led out to the periphery of the semiconductor chip as electrode pads such that the electrode pads can be connected to external leads by means of wire bonding or the like. Recently, a configuration has been adopted in which bump electrodes are formed on respective electrode pads and the bump electrodes are connected directly to corresponding terminals, leads or the like without using wire bonding from the viewpoints of down-sizing of electronic parts, labor-saving in assembly thereof, and the like. Progresses to high integration and to complexity of a semiconductor chip, however, have been accompanied by a tremendous increase in the number of electrode pads with a very narrow gap between adjacent electrode pads, and when direct connection of bump electrodes are tried using an adhesive or the like, there arise problems that adjacent electrode pads are short-circuited therebetween and that an element formed on a semiconductor chip receives an adverse influence by a temperature rise and a high pressure in adhesion.
On the other hand, in a case where a semiconductor chip is mounted, there is a free space in a center side area adjacent to the outer peripheral section on which electrode pads of the semiconductor chip are formed. Therefore, in order to effectively use the free space, a semiconductor device called a chip size package (CSP) has been put into practice in which as shown in FIG. 3, a wiring 21 aligned in position with a bump electrode 12 on an electrode pad 11 of a semiconductor chip 1 is formed on one surface of an insulating film (substrate) 2 made of polyimide or the like, while on the other surface of the insulating film 2, there are formed external connecting terminals 22 in distribution all over the surface, connected to the wiring 21.
Connection between the semiconductor chip 1 and the insulating film 2 are achieved in such a way that, for example, an anisotropic conductive adhesive (ACF) 8 is applied on the wiring 21 of the insulating film 2 and by pressing the semiconductor chip 1 to the insulating film 2, the anisotropic conductive adhesive 8 is pushed out sideways around a protrusion of the bump electrode 12 while at the bump electrode 12 itself, the conductive particles 81 are sandwiched by the bump electrode 12 and the wiring 21, to thereby establishing electrical connection between the bump electrode 12 and the wiring 21 via the conductive particles 81. On the other hand, in the lateral direction, conduction is cut off so as not to establish electrical connection since the anisotropic conductive adhesive 8 is in a state where the conductive particles 81 and the adhesive are mixed with each other. Therefore, no short-circuit occurs between adjacent electrode terminals even if a gap therebetween is narrow, thereby enabling connection only between an electrode terminal and a wiring, facing to each other.
In a semiconductor device of a CSP type in which as described above, a semiconductor chip and an insulating film are caused to adhere to each other, adhesion between both are realized with an anisotropic conductive adhesive. In adhesion using an anisotropic conductive adhesive, a process is required in which heating is performed for a long period of the order of 20 seconds while pressure contact is imposed therebetween at a value of the order in the range of from 20 to 50 g per each bump during adhesion. If such a pressure is applied for a long period in a adhesion process, not only is productivity lowered, but the pressure also acts directly onto a semiconductor layer below an electrode pad, leading to a problem of causing an abnormaly in a circuit element (semiconductor element) formed in the semiconductor layer. Therefore, the element cannot be formed below the electrode pad and therearound, resulting in a problem of being unable to fabricate a highly integrated semiconductor chip of a light weight, a thin thickness and a small size.